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FPGA/CPLD最新实用技术指南          【字体:
FPGA/CPLD最新实用技术指南
作者:杨 恒 李…    文章来源:21control    点击数:    更新时间:2005-12-6

图书简介:   FPGA/CPLD技术最近年来计算机与电子技术领域的又一场革命。本书以Xilinx与Altera公司的FPGA/CPLD为主,详细介绍了FPGA/CPLD从芯版式到MAX+plus II、Quartus与ISE开发环境和Verilog/VHDL语言,并以交通灯逻辑控制、电子钟与点阵LED显示、LCD液晶显示及计算机ISA接口和PCI接口的设计等为例,由浅入深地详述了如何应用FPGA/CPLD进行电子设计。书中的大多数电路图和源程序已经过实例验证,读者可以直接应用于自己的设计。本书的特点是强调实用性和无进性,力求通俗通懂。
本书适用于计算机、电子、控制及信息等相关专业的校大学生,对广大工程技术人员也具有实用价值。


《FPGA/CPLD最新实用技术指南》图书目录如下:
目      录  第0章    绪论                                      0.  1    FPGA/CPLD概述                                      0.  2    FPGA/CPLD的开发软件                                      0.  3    FPGA/CPLD的分类和使用                                      0.  4    因特网上的FPGA及其他资源                                      0.  5    本章小结                                      第1章    Xilinx  CPLD系列产品                                      1.  1    简介                                      1.  1.  1    XC9500系列CPLD器件                                      1.  1.  2    CoolRunner系列CPLD器件                                      1.  2    XC9500系列器件的结构                                      1.  3    CoolRunner系列CPLD器件的结构                                      1.  4    Xilinx  CPLD器件的命名                                      1.  5    本章小结                                      第2章    Xilinx  FPGA系列产品                                      2.  1    Spmlan-ⅡE系列产品                                      2.  1.  1    概述                                      2.  1.  2    器件结构                                      2.  2    Spartan-3系列产品                                      2.  2.  1    概述                                      2.  2.  2    器件结构                                      2.  3    Virtex-Ⅱ系列产品                                      2.  3.  1    概述                                      2.  3.  2    器件结构                                      2.  4    Virtex-ⅡPro系列产品                                      2.  4.  1    概述                                      2.  4.  2    器件结构                                      2.  5    Virtex-4系列产品                                      2.  5.  1    概述                                      2.  5.  2    Virtex-4系列的总体结构                                      2.  5.  3    Virtex-4的三个平台FPGA简介                                      2.  5.  4    Virtex-4FPGA综述                                      2.  6    本章小结                                      第3章    CPLD/FPGA的边界扫描测试                                      3.  1    引言                                      3.  2    IEEE1149.  1边界扫描测试的结构                                      3.  3    JTAGBST操作控制                                      3.  3.  1    抽样/预加载  SAMPLE/PRELOAD  指令模式                                      3.  3.  2    外测试  EXTEST  指令模式                                      3.  3.  3    旁路  BYPASS  指令模式                                      3.  3.  4    用户码  USRCODE  指令模式                                      3.  3.  5    ID码  IDCODE  指令模式                                      3.  4  Xilinx器件的边界扫描                                      3.  4.  1    数据存储器  Data  Register                                        3.  4.  2    指令集  Instruction  Set                                        3.  4.  3    位顺序  Bit  Sequence                                        3.  4.  4    在设计中插入边界扫描                                      3.  5    边界扫描描述语言  BSDL                                        3.  6    Xilinx器件下载                                      3.  6.  1    MultiLINX下载电缆                                      3.  6.  2    Xchecker下载电缆                                      3.  6.  3    Parallel下载电缆                                      3.  7    Altera与Lattice公司CPLD下载电路                                      3.  8    本章小结                                      第4章    Xilinx  ISE应用基础                                      4.  1    Xilinx  ISE简介                                      4.  2    安装Xilinx  ISE                                      4.  2.  1    系统需求                                      4.  2.  2    ISE的安装                                      4.  3    Xilinx  ISE应用入门                                      4.  4    Xilinx  ISE设计流程                                      4.  4.  1    设计输入                                      4.  4.  2    功能仿真                                      4.  4.  3    综合                                      4.  4.  4    实现                                      4.  4.  5    时序仿真                                      4.  4.  6    下载配置                                      4.  5    设计实例                                      4.  6    本章小结                                      第5章    Xilinx  ISE高级应用                                      5.  1    设计输入                                      5.  1.  1    硬件描述语言  HDL  输入方式                                      5.  1.  2    原理图  Schematic  输入方式                                      5.  2    功能仿真和时序仿真                                      5.  2.  1    功能仿真                                      5.  2.  2    时序仿真  对顶层文件进行仿真                                        5.  3    设计实现                                      5.  3.  1    运行实现设计                                      5.  3.  2    在布局规划器  Floorplanner  中查看设计布局                                      5.  4    引脚锁定与器件下载编程                                      5.  4.  1    引脚锁定                                      5.  4.  2    CPLD器件的编程下载                                      5.  5    应用ISE6.  2i的矩阵LED设计实例                                      5.  5.  1    功能要求及硬件设计                                      5.  5.  2控制逻辑设计                                      5.  5.  3    在ISE6.  2i中建立矩阵LED的工程文件并下载到CPLD运行                                      5.  6本章小结                                      第6章    MAX  plusⅡ10.  1的使用指南                                      6.  1    MAX  plusⅡ10.  1的特点                                      6.  2    MAX  plusⅡ的组成                                      6.  3    MAX  plusⅡ的使用                                      6.  3.  1    图形文件的建立                                      6.  3.  2    文本文件的建立                                      6.  3.  3    建立项层设计文件                                      6.  3.  4    工程文件的编译                                      6.  3.  5    模拟仿真                                      6.  3.  6    定时分析                                      6.  3.  7    器件编程                                      6.  4    本章小结                                      第7章    QuartusⅡ使用指南                                      7.  1    QuartusⅡ设计入门                                      7.  1.  1    简介                                      7.  1.  2    设计流程                                      7.  1.  3    设计入门                                      7.  1.  4    综合                                      7.  1.  5    仿真                                      7.  1.  6    布线与制板                                      7.  1.  7    块结构设计                                      7.  1.  8    对EDA工具使用LogicLock                                      7.  2    延时分析与延时终止                                      7.  2.  1    在QuartusⅡ软件中执行延时分析                                      7.  2.  2    使用EDA工具执行延时分析                                      7.  2.  3    延时终止                                      7.  3    工程设计.  调试与修改管理                                      7.  3.  1    使用SignalTap逻辑分析器                                      7.  3.  2    使用信号探针  SignalProbe                                        7.  3.  3    使用芯片编辑器                                      7.  3.  4      工程管理简介                                      7.  4    系统设计                                      7.  4.  1    用SOPC  Builder创建SOPC设计                                      7.  4.  2    用DSP  Builder创建DSP设计                                      7.  5    软件开发                                      7.  6    下载与配置                                      7.  7    本章小结                                      第8章    FLEX6000系列器件简介及应用实例                                      8.  1    FLEX6000系列器件简介                                      8.  1.  1    特点                                      8.  1.  2    概述                                      8.  1.  3    功能描述                                      8.  1.  4    输出配置                                      8.  1.  5  JTAG边界扫描                                      8.  2    交通信号灯控制逻辑设计                                      8.  2.  1    系统要求分析                                      8.  2.  2    控制逻辑描述                                      8.  3    电子钟的设计实例                                      8.  3.  1    功能要求和结构                                      8.  3.  2    控制芯片的设计                                      8.  4    字符型LCD  KS0066  接口的设计                                      8.  4.  1    原理介绍                                      8.  4.  2    字符型LCD  KS0066  接口的VHDL描述                                      8.  5    本章小结                                      第9章    FLEXl0K嵌入式可编程逻辑系列器件简介及应用实例                                      9.  1    FLEXl0K嵌入式可编程逻辑系列器件简介                                      9.  1.  1    特点                                      9.  1.  2    总体描述                                      9.  1.  3    功能描述                                      9.  1.  4    相同结构的输出引脚                                      9.  1.  5    时钟锁和时钟推进特性                                      9.  1.  6    输出设置                                      9.  1.  7    JTAG边界扫描                                      9.  1.  8    配置和操作                                      9.  2    应用FLEXl0K设计图像点阵型LCD                                      9.  2.  1    图像点阵型LCD原理介绍                                      9.  2.  2    基于FLEXl0K的图像点阵型LCD控制设计                                      9.  3    本章小结                                      第10章    应用FPGA设计PC机的ISA和PCI总线接口                                      10.  1    应用FPGA设计PC机的ISA总线接口                                      10.  1.  1    ISA总线概述                                      10.  1.  2    基于Altera  FLEX6000的ISA接口设计                                      10.  2    应用FPGA设计PC机的PCI总线接口                                      10.  2.  1    PCI总线概述                                      10.  2.  2    PCI总线命令                                      10.  2.  3    PCI总线访问地址解码                                      10.  2.  4    PCI配置空间操作                                      10.  2.  5    基于Altera公司的FLEX10K系列FPGA实现的PCI接口设计                                      10.  3    本章小结                                      附录A    Altera公司FPGA/CPLD系列器件纵览                                      附录B    VHDL编程基础                                      附录C    VerilogHDL编程基础                                      附录D    MAX  plusIIWindows2000驱动配置指南                                      附录E    MAX  plusI:WindowsXP驱动配置指南                                      附录F    ISE6.  1i的新增功能                                      附录G    FPGA/CPLD快速学习开发工具CHICAG06.  0                                      附录H    FPGNCPLD万能型快速学习开发器CHICAG08.  0                                      参考文献

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