| 网站首页 | 新闻 | SOPC | FPGA | DSP | ARM | 嵌入式操作系统 | 下载 | 网上商城 | 芯片价格参考 | 留言 | 论坛 | 网络协议 | 驱动设计 | 购买指南-HowtoBuy |

您现在的位置： FPGA开发板 FPGA 开发板 SOPC开发板 DSP开发板 视频开发板 －嵌入式控制研究室 >> SOPC >> 参考书籍 >> 文章正文

用户登录 新用户注册

挑战SOC--基于NIOS的SOPC设计与实践（1CD）    热      【字体：小 大】
挑战SOC--基于NIOS的SOPC设计与实践（1CD）
作者：佚名    文章来源：21control    点击数：    更新时间：2005-12-6
所属类别: 音像/教育  图书简介：  本书主要介绍Altera公司的软核CPUNios和采用该CPU进行嵌入式系统设计的流程与方法。并 以此为着眼点，介绍Altera的片上可编程系统SOPC的设计原理与实践技术，引领读者在低投入的情况下，较快地进入片上系统SOC的殿堂。 本书以Altera公司的技术资料为蓝本，由浅入深地阐述了Nios软核处理器的CPU结构、总线传输模式以及相关外设。同时也简要说明了软件的开发过程。既可作为学习Nios处理器的入门指导书，也可作为设计参考手册。 本书附录中刊载了Altera23年Nios嵌入式软核心处理器设计大赛中中国大陆赛区和中国台湾赛区的全部获奖作品，这一部分是由获奖者撰写的，读者可以从中获得有益的启示。 本书附带一张光盘，包含了Altera提供的24年新版Quartusll4．软件和Nios处理器的开发包，读者可以藉此开始SOPC的旅程。 本书可供电子和通信等领域从事硬件设计和系统开发的工程技术人员和教师阅读参考，也可以作为相关专业研究生和高年级本科生的教材。 前言 《Altera*SOPC设计与实践》主要是由参加Altera23年Nios嵌入式软核心处理器设 计大赛并获一等奖的研究生们编译成书的。23年4月～8月，复旦大学信息科学与工程 学院的研究生周博等，在指导教师的支持下，参加了该项设计比赛。通过近 ........ 更多> 《挑战SOC--基于NIOS的SOPC设计与实践（1CD）》图书目录如下： 目      录  第1章  绪论                                      1.1  概述                                      1.2  本书内容安排                                      1.3  设计步骤                                      1.4  支持NIOS  CPU的FPGA型号                                                                            第2章  SOPC  Builder开发环境                                      2.1  创建Quartus  II工程                                      2.2  创建NIOS系统模块                                      2.2.1  创建新的.bdf                                      2.2.2  开始使用SOPC  Builder                                      2.2.3  系统主频                                      2.2.4  加入CPU和IP模块                                      2.2.5  指定基地址                                      2.2.6  配置NIOS系统                                      2.2.7  生成NIOS32并把它加入到设计中                                      2.2.8  把符号  symbol  加入到BDF文件中                                      2.2.9  加入引脚和基本单元                                      2.2.10  命名引脚                                      2.2.11  进行最后连接                                      2.3  编译  Compilation                                        2.3.1  创建编译器设置                                      2.3.2  指定器件系列  Device  Family  与型号                                      2.3.3  为器件引脚分配信号                                      2.3.4  确认引脚分配                                      2.3.5  指定设备与编程设置                                      2.3.6  指定配置文件类型                                      2.3.7  编译用户设计                                      2.4  编程  Programming                                        2.4.1  配置FPGA                                      2.4.2  在NIOS系统上运行软件                                                                            第3章  NIOS  CPU结构                                      3.1  NIOS处理器概述                                      3.1.1  指令总线主端口                                      3.1.2  数据总线主端口                                      3.1.3  缓存                                      3.1.4  移位单元                                      3.1.5  乘法支持                                      3.1.6  中断支持                                      3.1.7  NIOS片上调试模块                                      3.1.8  开发环境                                      3.2  内部寄存器                                      3.2.1  通用寄存器文件                                      3.2.2  K寄存器                                      3.2.3  %r0  %g0  寄存器                                      3.2.4  程序计数器                                      3.2.5  控制寄存器                                      3.3  流水线                                      3.4  存储器组织                                      3.5  寻址方式                                      3.6  程序流程控制                                                                            第4章  Avalon总线规范                                      4.1  概述                                      4.2  术语和概念                                      4.3  Avalon总线传输                                      4.3.1  主端口接口与从端口接口                                      4.3.2  Avalon总线时序                                      4.3.3  Avalon总线信号                                      4.3.4  并发多主端口Avalon总线需考虑的事项                                      4.4  Avalon从端口传输                                      4.4.1  从传输的Avalon总线信号                                      4.4.2  Avalon总线上的从端口读传输                                      4.4.3  在Avalon总线上的从端口写传输                                      4.5  Avalon主端口传输                                      4.5.1  主传输的Avalon信号                                      4.5.2  Avalon总线上的基本主端口读传输                                      4.5.3  Avalon总线上的基本主端口写传输                                      4.6  高级Avalon总线传输                                      4.6.1  带延迟的Avalon读传输                                      4.6.2  流传输模式                                      4.6.3  Avalon总线控制信号                                      4.7  片外设备与Avalon总线的接口                                      4.7.1  从传输的Avalon三态信号                                      4.7.2  无延迟的Avalon三态从端口读传输                                      4.7.3  带固定延迟的Avalon三态从端口读传输                                      4.7.4  Avalon三态从端口写传输                                      4.8  Avalon总线地址对齐方式                                      4.8.1  地址对齐概述                                      4.8.2  为Avalon外设选择地址对齐参数                                      4.8.3  静态地址对齐                                      4.8.4  动态地址对齐                                      4.9  连接到外部设备                                                                            第5章  软件设计流程和方法                                      5.1  软件开发包                                      5.1.1  软件开发流程                                      5.1.2  SDK树目录简介                                      5.1.3  编译后代码结构                                      5.1.4  NIOS库函数                                      5.1.5  高级C语言支持                                      5.2  软件开发常用命令                                      5.2.1  hexout2flash                                      5.2.2  nios_build                                      5.2.3  nios_console                                      5.2.4  nios_convert                                      5.2.5  nios_debug                                      5.2.6  nios_run                                      5.2.7  srec2flash                                                                            第6章  外设的组织与使用                                      6.1  SOPC  Builder与PTF文件                                      6.1.1  SOPC  Builder组成                                      6.1.2  PTF文件的两种类型                                      6.1.3  SOPC  Builder设计流程                                      6.2  SOPC  Builder的外设                                      6.2.1  定时器                                      6.2.2  并行输入输出模块                                      6.2.3  异步收发器（UART）                                      6.2.4  DMA控制器                                                                            第7章  中断处理                                      7.1  中断处理过程                                      7.1.1  异常处理的基础知识                                      7.1.2  NIOS中断处理基础                                      7.1.3  NIOS异常处理步骤                                      7.2  中断处理的例子：UART收发程序                                      7.2.1  在NIOS系统中实现ISR                                      7.2.2  串口通信基础                                      7.2.3  实现NIOS  UART  ISR                                      7.2.4  代码示例                                                                            第8章  调试手段                                      8.1  GERMS监控程序                                      8.1.1  监控程序命令                                      8.1.2  GERMS引导过程                                      8.1.3  采用GERMS从闪存中引导系统                                      8.2  FS2公司的System  Analyzer                                      8.2.1  简介                                      8.2.2  设置调试器                                      8.2.3  使用调试器                                      8.2.4  调试命令列表                                      8.2.5  OCI调试模块相关软件子程序                                                                            第9章  高级特性                                      9.1  用户自定义指令                                      9.1.1  用户自定义指令的概念                                      9.1.2  硬件接口                                      9.1.3  软件接口                                      9.1.4  加速效果                                      9.1.5  用户自定义指令实例                                      9.2  并发多主设备总线结构                                      9.2.1  传统总线结构                                      9.2.2  并发多主设备总线结构                                      9.3  NIOS嵌入式处理器设计的模拟                                      9.3.1  软件配置                                      9.3.2  模拟设置                                      9.3.3  使用ModelSim进行模拟                                      9.3.4  分析模拟结果                                      9.3.5  增加或删除波形图信号                                      9.3.6  片外存储器模拟                                                                            第10章  新版NIOS  II的特点                                      10.1  简介                                      10.2  处理器的实现                                      10.3  寄存器文件                                      10.4  算术逻辑单元                                      10.4.1  未实现的指令                                      10.4.2  用户自定义指令                                      10.5  异常和中断的控制                                      10.5.1  异常控制器                                      10.5.2  集成的中断控制器                                      10.6  存储器与I/O组织                                      10.6.1  指令和数据总线                                      10.6.2  缓存                                      10.6.3  地址映像                                      10.7  硬件辅助调试模块                                                                            附录A  汇编指令及伪指令参考                                      符号说明                                      32位指令集                                      IFS和SKPS指令的条件代码                                      汇编语言伪指令与宏                                      附录B  Altera  2003年NIOS嵌入式软核心处理器设计大赛获奖单位                                      一.  中国大陆部分                                      二.  中国台湾地区
文章录入：fengfeiyi    责任编辑：fengfeiyi
	上一篇文章： 《基于FPGA的嵌入式系统设计》 下一篇文章： 嵌入式处理器原理及应用——Nios系统设计和C语言编程
【发表评论】【加入收藏】【告诉好友】【打印此文】【关闭窗口】

最新热点		最新推荐		相关文章
				SOPC技术在电力机车改造中的… 基于SOPC技术的核信息远程采… 把SOPC Builder用于非Nios系… SOPC自定义模块的添加和接口… NiosII开发常见问题 应用SoPC Builder开发电子系… nios ii的 中断 nios flash read/write sopc Flash Programmer,nios… 基于μClinux的SoPC应用系统…

网友评论：（只显示最新10条。评论内容只代表网友观点，与本站立场无关！）

| 设为首页 | 加入收藏 | 联系站长 | 友情链接 | 版权申明 | 管理登录 |
	Copyright © 2005www.21control.com  嵌入式控制技术研究室 版权所有 站长：康草科技