The Quartus II software version 7.2  includes support for several new devices, including members of the following device families:

• Arria GX

• Cyclone III

• Stratix III

For information on all devices supported in the Quartus II software version 7.2, go to Devices and Adapters.

Full Device Support

Full compilation, simulation, timing analysis, and programming support is available for the following new devices and device packages:

Arria GX Devices

• EP1AGX20F484

• EP1AGX35F484

• EP1AGX20F780

• EP1AGX35F780

• EP1AGX50F484

• EP1AGX50F1152

• EP1AGX50F780

• EP1AGX60F484

• EP1AGX60F1152

• EP1AGX60F780

• EP1AGX90F1152

Cyclone III Devices

• EP3C5E144

• EP3C5F256

• EP3C5U256

• EP3C10E144

• EP3C10F256

• EP3C10U256

• EP3C25U256

• EP3C55F484

• EP3C55F780

• EP3C55U484

• EP3C120F484

• EP3C120F780

Stratix III  Devices

• EP3SL150F780

• EP3SL150F1152

Advanced Support

Full compilation, simulation, timing analysis, programming support, and pin-out tables are not yet available for the following new devices and packages:

 

Cyclone III

• EP3C16U256

• EP3C16U484

• EP3C40U484

• EP3C80U484

Stratix III  Devices

• EP3SL200F780

• EP3SE260H780

• EP3SL340H1152

The Quartus II software version 7.2 introduces Windows Vista (32-bit and 64-bit) support.

The Quartus II software offers multiprocessor support to take advantage of dual and quad core computers.

Using advanced place-and-route algorithms and support for multi-core processors, the Quartus II software version 7.2 and Stratix III FPGAs deliver a 2-speed grade advantage and 3X faster compilation times when compared to competing high-end 65-nm FPGAs.

The Quartus II software version 7.2 supports the following EDA tools (an asterisk * indicates tools that include NativeLink integration support):

Synthesis Tools

Simulation Tools

Formal Verification Tools

Board-Level Tools

Board-Level Symbol/Pinout Management Tools

The Chip Planner can now display clock regions, and can show potential fan-ins and fan-outs between pins and clock regions.

You can now make changes to DSP and RAM atoms with the Resource Property Editor.

You can verify the legality of new and existing pin assignments with the live I/O check feature and view the results in the Live I/O Check Status window. Live I/O check verifies the pin assignments against a subset of the complete I/O assignment analysis rules. 

The State Machine Editor allows you to create graphic representations of state machines for use in your design. Creating state machines using the State Machine Editor allows you to describe complex control logic and state machines used, for example, in DSP processors, without the need for writing lengthy and complex Verilog HDL or VHDL source code. You can, however, generate a Verilog HDL or VHDL design file directly from the State Machine Editor with the Generate HDL File command.

The Report Timing dialog box in the TimeQuest Timing Analyzer now produces a report with a new layout. This layout includes path summaries and details, tabbed information, new path statistics, and a new waveform view.

The $global_glosspop')">fmax.

The new Report DDR command creates a new DDR report.

You can now create Synopsys Design Constraints Files (.sdc) with the Quartus II Text Editor, and  you can specify SDC timing constraints and exceptions.

For Stratix III devices, Advanced I/O Timing now supports Cyclone III devices, and the Board Trace Model window of the Pin Planner is now available for both Stratix III and Cyclone III device families.

The SignalTap II Logic Analyzer now provides state-based trigger flow control, which allows you to organize trigger conditions into states based on a conditional flow that you define, and provides control of the acquisition buffer.

The new Insert Avalon-ST Adapters command inserts an Avalon-ST adapter to connect a data source to a data sink of differing byte sizes in the SOPC Builder system.

The Quartus II software version 7.2 supports the following new megafunctions:

• altfp_compare megafunction

• altfp_sqrt megafunction

• altmult_complex megafunction

• dcfifo_mixed_widths megafunction

Additionally, the qmegawiz MegaWizard Plug-In Manager command-line mode allows you to create and modify design files that contain custom megafunction variations

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